Nowadays, flash memories are very common in storage system. Various kinds of memory technology make different flash types. NAND flash memory is one of the most popular memory devices for storage. With advantages of high speed, high density, and low power consumption, and low cost, so NAND flash is widely used in mobile system, including mobile phone, MP3 player, digital camera, tablet PC, and etc. Temperature tolerance is an important factor for mobile devices. Temperature sensitivity is one characteristic of NAND flash memory, especially for more advanced process technology. When an error bit number is over capability of ECC correction limit, the Read Retry method will be applied to fix this problem. Legacy Read Retry method is capable for overcoming this problem, but usually not effective. Legacy Read Retry method, tests different sense voltage one by one from minimum to maximum, may take a time before find out the suitable sense voltage. This read retry sequence could result in significant sudden performance drop. Steady read/write performance is important for mobile application. This invention introduces an effective way to decrease tests in Read Retry. With additional temperature information of current temperature and programming temperature, better testing sequence for different sense voltages can be achieved to save time.
Please refer to FIG. 1, which is a flowchart showing a conventional flash memory write command process.
The steps of a conventional flash memory write command process are:                step S11: receiving a “WRITE” command (CMD); and        step S12: writing data into a flash memory.        
Please refer to FIG. 2, which is a flowchart shown a conventional flash memory read command process. The steps of the process are:                step S21: receiving a “READ” command (CMD);        step S22: reading data from a NAND flash memory;        step S23: judging if the Cyclic Codes match; if yes, terminates the process; if no, runs to next step;        step S24: checking if an ECC engine can correct; if yes, the ECC engine starts to correct (step S241); if no, runs to next step;        step S25: applying a voltage VT1 as a first test voltage for Read Retry to a memory cell array;        step S26: reading data from the NAND flash memory;        step S27: judging if the Cyclic Codes match; if yes, runs to step S241; if no, runs to next step;        step S28: checking if the ECC engine can correct; if yes, runs to step S241; if no, runs to next step; and        step S29: checking if all available test voltages VTn are tried; if yes, reports an uncorrectable error (step S291); if no, applying another test voltage VTn (step S292) and loops to step S22.        
When an error bit number is over the ECC engine capability, multiple sense voltages will be tested in sequence. These test voltages start from VT1, the lowest voltage level, to VTn, the highest voltage level. Once the error bit number of the flash data is within ECC engine coverage, then the ECC engine would recover these error bits.
However, shown as FIG. 3, a first pulse curve CU1 under a first temperature, such as room temperature, and a second pulse curve CU2 under a second temperature, such as programming temperature higher than room temperature (same as for lower than room temperature), are different, where the horizontal axis is time and the vertical axis is the quantity of data. Under the first temperature, the process starts from VT1 to VTn, e.g. VT1 to VT7. But under the second temperature, the second pulse curve CU2 is shifted to right of the first pulse curve CU1 and the process also starts from VT1 to VTn to test, e.g. compared to the first pulse curve CU1, VT1 to VT2 are failed and VT3 to VT7 are passed.
No matter the temperature is, the process always starts from VT1. It is wasting much time for testing.
Please also refer to U.S. publication application No. US20100322007 (hereafter '007), which A flash memory device and method of reading data are disclosed. The method includes; performing a test read operation directed to test data stored in a memory cell array of the flash memory device by iteratively applying a sequence of test read retry operations, wherein each successive test read retry operation uses a respectively higher test read voltage level than a preceding test read retry operation, until one test read retry operation in the sequence of test read retry operations successfully reads the test data using a minimum test read retry voltage associated with the one test read retry operation, setting an initial read voltage for the flash memory device equal to the minimum test read retry voltage, and thereafter performing a normal read operation directed to user data stored in the memory cell array by iteratively applying a sequence of read retry operations, wherein an initial read.
However, the method of '007 which is correcting the error resulting from different temperature of the flash memory is less of efficiency.